China's CXMT Begins First HBM3E Production, Cracking Open the AI Memory Bottleneck

China’s most important memory-chip breakthrough just moved from roadmap to reality. ChangXin Memory Technologies (CXMT), the country’s largest DRAM maker, has begun producing HBM3E — high-bandwidth memory — in small quantities, according to a report from The Information citing two people familiar with the matter. It is the first time a Chinese company has manufactured the advanced stacked memory that modern AI accelerators depend on, and it arrives at a moment when HBM has become one of the tightest bottlenecks in the entire AI supply chain.

Why HBM3E matters more than it sounds

High Bandwidth Memory is not a ordinary DRAM. It is built by vertically stacking DRAM dies and connecting them through-silicon vias, then placing the stack on the same package as the GPU or AI accelerator. That proximity gives the processor an enormous memory highway — the reason an Nvidia H200 or a Huawei Ascend cluster can feed large models fast enough to train and serve them at all. Without HBM, a frontier AI chip is effectively a sports car with a straw for a fuel line.

That is precisely why the US Commerce Department placed HBM under export controls in December 2024: advanced HBM chips cannot legally be sold to China, precisely because they are a chief bottleneck for Huawei’s Ascend AI accelerators and the broader Chinese AI-chip ecosystem. Every HBM stack China could not make domestically was a hard ceiling on how many AI accelerators it could ship, no matter how good its logic-chip design became.

CXMT’s small-batch HBM3E production does not remove that ceiling. But it proves, for the first time in silicon rather than slideware, that the ceiling is breakable.

What we know about the milestone

According to The Information’s sources, CXMT is now producing HBM3E in small quantities and plans to expand production in 2027. Several Chinese chip designers — including Alibaba’s T-Head unit and Cambricon, the listed AI-chip maker whose shares have surged this year — are already testing the memory and plan to use it in products starting in 2027.

The context makes the milestone more credible than a typical national-champion announcement. CXMT completed a landmark IPO on the Shanghai Stock Exchange in late July 2026, raising $8.6 billion — China’s largest A-share listing of the year — to fund capacity expansion. Its debut surged over 400% on the first day, briefly spooking Micron and SK Hynix shares and prompting discussion on Capitol Hill. Research from SemiAnalysis and Tom’s Hardware-reported figures suggests CXMT will finish 2026 with roughly 350,000 DRAM wafer starts per month, within about 25,000 wafers of Micron — putting China on track to become the world’s second-largest DRAM producer.

The company has also been racing up the commodity-memory ladder. It has moved from LPDDR4/DDR4 into DDR5 and LPDDR5, displacing Micron’s share of the Chinese market: Micron’s China-derived revenue fell from about 14% of its total in 2023 to roughly 7% by 2025.

A generation behind — and three to five years

The sober counterweight is the technology gap. Samsung, SK Hynix, and Micron are already mass-producing HBM4, the generation beyond HBM3E, for Nvidia’s newest accelerators. The Information reports CXMT remains three to five years behind the leaders technically, and it struggles with low yields — SemiAnalysis estimated HBM yields at around 25% in June. Notably, CXMT’s own IPO prospectus did not earmark any of the $8.6 billion raise specifically for HBM, suggesting the program is funded and prioritized more quietly than its DRAM expansion.

A 25% yield on stacked memory is economically punishing. HBM is harder to manufacture than standard DRAM because every die in the stack must work, and defects compound across layers; the leaders spent years pushing yields from painful to profitable. CXMT must also solve advanced packaging (through-silicon vias, hybrid bonding on future generations) largely without the leading Western equipment suppliers, since those tools fall under the same export-control umbrella.

What it means for the AI chip war

For Beijing, the strategic logic is straightforward. Huawei’s Ascend roadmap, Cambricon’s products, and Alibaba’s T-Head designs all need domestic HBM to scale without violating US export rules. If CXMT’s 2027 ramp lands, China’s AI-chip output would no longer be gated by its weakest link — memory — and could scale with logic-chip capacity instead. That is the difference between a contained ecosystem and a self-sufficient one.

For the incumbents, the threat is medium-term but real. SK Hynix holds the lion’s share of the HBM market today, with Samsung racing to catch up and Micron in third place. None of them will lose AI-memory share to CXMT in 2026. But commodity DRAM is a different story: every DDR5 wafer CXMT adds exerts pricing pressure on the memory giants’ cash cows — the same cash cows that fund their HBM R&D. Micron’s sliding China share is the early evidence.

The market reaction on Monday was a preview of the new equilibrium. Memory stocks including Micron and SK Hynix moved lower on the news, while Chinese AI-chip and semiconductor names rallied. Barron’s framed it as a “Micron under threat” story; Beijing framed it as self-reliance delivered.

The bottom line

CXMT’s first HBM3E chips are a down payment, not a victory. Volumes are small, yields are low, and the generation gap to HBM4 remains wide. But the direction of travel is now unambiguous: export controls bought time; they did not buy permanence. China’s memory champion has demonstrated it can build the AI era’s most strategic component on domestic soil, its customers are lining up for 2027, and a $8.6 billion war chest is being deployed. The AI memory oligopoly — SK Hynix, Samsung, Micron — just got its first serious fourth contender, and the second half of this decade’s AI hardware race just became considerably more interesting.