Iris Goes Into Production: Meta's Homegrown AI Chip Aims Straight at Nvidia's Bill

The most consequential chip launch of September 2026 does not have Nvidia’s name on it. Meta Platforms’ homegrown AI accelerator, code-named Iris, enters manufacturing this month, according to an internal memo reviewed by Reuters — the first hardware from the company’s four-generation MTIA program to clear validation and head for volume production on a six-month cadence the semiconductor industry normally considers impossible.

The details in that memo matter more than the headline. Testing took only six weeks and surfaced no major issues — a validation speed that is itself the plan, expressed in engineering terms. Meta designed the chip with Broadcom, is having it manufactured at TSMC, and tailored every design decision to one customer’s workloads: its own. Production timing and the bug-testing completion had not been previously reported; Meta declined to comment.

What Iris actually is

Iris is the newest entry in the Meta Training and Inference Accelerator (MTIA) program, the in-house silicon line Meta laid out in March 2026 across four planned generations — MTIA 300, 400, 450, and 500 — with a new chip arriving roughly every six months through 2027, about double the pace at which firms typically release AI chips.

The family’s job description has evolved fast. Per Meta’s own engineering blog:

• MTIA 300 — optimized for ranking and recommendation (R&R), the dominant Meta workload before generative AI took off. It is already in production for R&R training, with hundreds of thousands of MTIA chips deployed.
• MTIA 400 — the first MTIA chip designed for raw performance competitive with leading commercial products, with 400% higher FP8 FLOPS and 51% higher HBM bandwidth than MTIA 300. A rack of 72 devices forms a single scale-up domain.
• MTIA 450 — doubles HBM bandwidth again (higher than existing leading commercial products, per Meta), raises MX4 FLOPS 75% for mixture-of-experts inference, and adds hardware acceleration for Softmax and FlashAttention bottlenecks. Mass deployment is scheduled for early 2027.
• MTIA 500 — adds another 50% HBM bandwidth, up to 80% more HBM capacity, and 43% higher MX4 FLOPS, using a 2x2 chiplet configuration. Mass deployment is scheduled for 2027.

From MTIA 300 to MTIA 500, HBM bandwidth increases 4.5x and compute FLOPS increase 25x — in under two years.

Iris sits inside that roadmap as the production chip of the moment. It is built to run the systems that keep Facebook and Instagram working: the ranking and recommendation models that decide what more than three billion people see every day, plus the generative AI features spreading across Meta’s apps. Notably, the strategy is inference-first: mainstream GPUs are built for the most demanding workload (large-scale pre-training) and then applied to inference less cost-effectively; MTIA inverts that, optimizing for inference from the start.

The 14-gigawatt backdrop

Iris is one piece of a much larger industrial plan described in the memo. Meta plans to deploy seven gigawatts of computing infrastructure in 2026 — it added 1 GW in the first half of the year and forecasts roughly 5.5 more by year’s end — and intends to double capacity to 14 gigawatts in 2027. One gigawatt powers roughly 800,000 homes; at full buildout, Meta intends to run computing that draws as much power as about a dozen nuclear reactors produce.

The company expects to spend as much as $145 billion on AI infrastructure this year (guidance raised in April to $125–145 billion, nearly double 2025), a significant portion of Big Tech’s more than $700 billion projected outlay. To expand, Meta has signed long-term, multi-year supply agreements: Samsung Electronics for memory chips, Sandisk for flash storage, and Sumitomo Electric for fiber-optic equipment. Those contracts landed amid a memory shortage severe enough that “chipflation” has become a macroeconomic concern, per Morgan Stanley analysts.

Why custom silicon, why now

The memo is candid about the motivation: Iris is meant to augment the large quantities of Nvidia and AMD GPUs Meta buys, not replace them overnight — but adopting the latest GPUs “has been a heavy lift, and it has cost us time.” The division of labor is straightforward: custom silicon absorbs the steady, well-understood internal workloads, while frontier training that changes shape year to year stays on GPUs.

“You can’t become an AI titan if you are dependent on another company for chips,” Forrester VP and principal analyst Mike Gualtieri told Reuters. “The hyperscalers and even SpaceX all plan chips because it will be the only way to compete on price for model usage.”

Custom chips pay off under narrow conditions: the workload must be known in detail, stable enough to justify a multi-year design cycle, and large enough that single-digit efficiency gains translate into real money. Meta passes all three tests because its dominant AI workload is itself — feed ranking, recommendations, and the ad auctions they feed. Every point of efficiency on that silicon lands directly on the cost side of the advertising business that generates the overwhelming majority of its revenue.

There is also a structural difference from every other hyperscaler’s program. Google rents TPUs through its cloud; Amazon sells Trainium capacity through AWS; Microsoft’s chips serve Azure clients. Iris answers to no paying customer and no rival’s spec sheet — one user, one test: whether it runs Meta’s own workloads for less than bought hardware does. That is a lower bar and a purer cost calculation.

The velocity bet

The six-week bug clearance is what makes the six-month cadence believable. A chip program that ships twice a year has no room for the long debugging cycles the industry plans around. Meta achieves this through radical modularity: accelerators architected as systems of chiplets — discrete, reusable building blocks for compute, I/O, and networking — where each chiplet can be upgraded separately in months rather than years, and different chiplets can be manufactured at the most cost-effective process nodes. At the system level, MTIA 400, 450, and 500 share the same chassis, rack, and network infrastructure, so each generation drops into the same physical footprint.

The software side follows the same logic: the MTIA stack is PyTorch-native (PyTorch originated at Meta), built on vLLM, Triton, and Open Compute Project standards, so models deploy on both GPUs and MTIA simultaneously with no chip-specific rewrites.

Broadcom’s role deserves emphasis — it is the same design partner behind Google’s newest TPU and OpenAI’s first custom chip, making it the silent arms dealer of the custom-silicon era.

What to watch

Iris entering production does not mean Meta stops buying Nvidia — the memo positions custom silicon as a supplement. But the direction of travel is clear, and it compounds: a chip that runs the core workload even modestly cheaper saves billions at Meta’s scale, and each six-month generation widens the covered workload range from ranking into generative inference.

The September production start is also a credibility test. If Iris ramps on schedule, Meta will have demonstrated the fastest silicon iteration loop of any hyperscaler. If it slips, skeptics of the company’s $145 billion bet get fresh ammunition. Either way, the market got a preview of the stakes: Meta shares initially fell on the Reuters report, then recovered after the company announced developer access to an AI coding model that positions it against OpenAI and Anthropic — trading up 4.6% by late afternoon.

The buildout’s economics now rest on a simple equation: own the silicon that runs the workloads you understand best, lock the supply lines years ahead, and let the compounding do the work. September is when that equation meets the fab.